1. Field of the Invention
The present invention relates to a method for manufacturing semiconductor equipment comprising integrated circuits, which is particularly used for a surface mounting type semiconductor device, which is mounted on a printed wiring board by a flip-chip connection.
In recent years, as integrated circuits (ICs) are being miniaturized and achieving higher speed technology in the manufacturing field for semiconductor equipment, a so-called flip-chip connection is now increasingly used to directly connect a semiconductor device to the wirings on a printed wiring board by means of bumps, such as solder formed on a bonding pad.
Usually, such a surface mounting type semiconductor device is subjected to a performance test (die sort test which includes electrical testing to determine whether the device is bad) before the formation of bumps, to determine whether ICs are good or bad. Then the conforming articles are supplied to the assembly line.
2. Description of Related Art
FIGS. 3(a) and (b) show a known semiconductor device with a bonding pad, which is also used as a test pad during the die sort test.
However, as shown in FIG. 3(a), for this semiconductor device, the die sort test is carried out by applying a probe needle 4 onto a bonding pad 3 exposed on a passivation film 2 that is formed on an interlayer insulating layer 1 on a semiconductor substrate.
Accordingly, as shown in FIG. 3(b), the bonding pad 3 becomes deformed by the contact of the probe needle 4 so that bump 5 cannot be normally formed on pad 3.
To solve this problem, a technique has been proposed to provide a dedicated test pad, for the die sort test, separately from the bonding pad for forming bumps.
FIGS. 4(a) and (b) show a semiconductor device wherein a test pad is formed separately from a bonding pad. FIG. 4(c) shows a plan view of a bonding pad structure having a bonding pad for testing. FIG. 4(d) shows a sectional view of FIG. 4(c) along dotted line A-A'.
In this semiconductor device, the bonding pad 3 is not deformed by the contact of the probe needle 4 during the die sort test, so that bump 5 can be normally formed on bonding pad 3.
However, this technique provides a lower assembly yield for the following reason: That is, since bump 5 is also formed on the test pad 6, as shown in FIG. 4(c), this results in a short-circuit in the connections with the other wirings in the assembly process, thereby lowering the assembly yield.